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This position can be filled at the Associate Digital ASIC Circuit Design Engineer level or the Digital ASIC Circuit Design Engineer level. Qualifications for both are listed below: 

 

Job Description: 

• Circuit behavioral coding in Verilog, System Verilog or VHDL RTL. 
• Circuit synthesis, formal verification, and static timing using state of the art digital ASIC design tools. 
• Developing verification plans based on requirements of the circuit and creating circuit functional test benches in RTL. 
• Generating manufacturing test vectors and manufacturing circuit test plan. 
• Help to develop automated procedures to streamline digital design procedures. 

Required Education: 

• Bachelor's degree in a technical area (BSEE or other Engineering discipline) with a minimum of 6 months of related experience. 

-OR-

• Bachelor's degree in a technical area (BSEE or other Engineering discipline) and a minimum of 2 plus years of relevant experience; Masters Degree and 0 years. 

 

Required Skills: 

• Digital electronics coursework including logic design and analysis. 
• Strong problem solving and analytical skills. 
• Ability to communicate effectively to team members both verbally and in writing. 
• Ability to adapt to changing priorities and requirements. 

 

Desired Skills: 

• Experience in RTL coding in System Verilog, Verilog, or VHDL. 
• Knowledge of the front-end ASIC design process from RTL to gates (RTL coding, simulation, synthesis, static timing analysis, logic equivalence, DFT insertion). 
• Familiarity with electronic test hardware (O-scopes, network analyzers, signal generators, etc...). 
• Experience in at least one of MATLAB, Python, C, or C++. 
• Experience with test automation and data analysis in MATLAB. 
• Experience with digital logic test automation. 

 
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